cp2k, libxc, libint: fix builds with %intel, resp. intel-parallel-studio+mkl (#19522)
* cp2k: locate correct include dir when using intel-parallel-studio+mkl for fftw-api * libxc: drop arch-specific intel opt. flags fixes #17794 * libint: drop arch-specific intel opt. flags, always build Fortran example with FC fixes #17509
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3 changed files with 23 additions and 39 deletions
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@ -193,7 +193,12 @@ def edit(self, spec, prefix):
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fftw_header_dir = fftw.headers.directories[0] + '/fftw'
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fftw_header_dir = fftw.headers.directories[0] + '/fftw'
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elif '^intel-parallel-studio+mkl' in spec:
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elif '^intel-parallel-studio+mkl' in spec:
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fftw = spec['intel-parallel-studio']
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fftw = spec['intel-parallel-studio']
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fftw_header_dir = fftw.headers.directories[0] + '/fftw'
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fftw_header_dir = '<NOTFOUND>'
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for incdir in [join_path(f, 'fftw')
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for f in fftw.headers.directories]:
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if os.path.exists(incdir):
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fftw_header_dir = incdir
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break
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optimization_flags = {
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optimization_flags = {
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'gcc': [
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'gcc': [
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@ -78,10 +78,10 @@ def autoreconf(self, spec, prefix):
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@property
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@property
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def optflags(self):
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def optflags(self):
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flags = '-O2'
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flags = '-O2'
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# Optimizations for the Intel compiler, suggested by CP2K
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# See ../libxc/package.py for rationale and doc.
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# microarchitecture-specific optimization flags should be controlled
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if '%intel' in self.spec:
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# by Spack, otherwise we may end up with contradictory or invalid flags
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flags += ' -xSSE4.2 -axAVX,CORE-AVX2 -ipo'
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# see https://github.com/spack/spack/issues/17794
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return flags
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return flags
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@ -99,18 +99,16 @@ def configure_args(self):
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config_args = ['--enable-shared']
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config_args = ['--enable-shared']
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optflags = self.optflags
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# Optimization flag names have changed in libint 2
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# Optimization flag names have changed in libint 2
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if self.version < Version('2.0.0'):
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if self.version < Version('2.0.0'):
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config_args.extend([
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config_args.extend([
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'--with-cc-optflags={0}'.format(optflags),
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'--with-cc-optflags={0}'.format(self.optflags),
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'--with-cxx-optflags={0}'.format(optflags)
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'--with-cxx-optflags={0}'.format(self.optflags)
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])
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])
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else:
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else:
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config_args.extend([
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config_args.extend([
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'--with-cxx-optflags={0}'.format(optflags),
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'--with-cxx-optflags={0}'.format(self.optflags),
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'--with-cxxgen-optflags={0}'.format(optflags)
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'--with-cxxgen-optflags={0}'.format(self.optflags)
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])
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])
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# Options required by CP2K, removed in libint 2
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# Options required by CP2K, removed in libint 2
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@ -199,6 +197,6 @@ def install(self, spec, prefix):
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def patch(self):
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def patch(self):
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# Use Fortran compiler to link the Fortran example, not the C++
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# Use Fortran compiler to link the Fortran example, not the C++
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# compiler
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# compiler
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if '+fortran' in self.spec and self.spec.satisfies('%nvhpc'):
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if '+fortran' in self.spec:
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filter_file('$(CXX) $(CXXFLAGS)', '$(FC) $(FCFLAGS)',
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filter_file('$(CXX) $(CXXFLAGS)', '$(FC) $(FCFLAGS)',
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'export/fortran/Makefile', string=True)
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'export/fortran/Makefile', string=True)
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@ -64,37 +64,18 @@ def libs(self):
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)
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)
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def setup_build_environment(self, env):
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def setup_build_environment(self, env):
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optflags = '-O2'
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# microarchitecture-specific optimization flags should be controlled
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if self.compiler.name == 'intel':
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# by Spack, otherwise we may end up with contradictory or invalid flags
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# Optimizations for the Intel compiler, suggested by CP2K
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# see https://github.com/spack/spack/issues/17794
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#
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# libxc on the other hand only sets the generic -O2 when it detects GCC
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# Note that not every lowly login node has advanced CPUs:
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#
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# $ icc -xAVX -axCORE-AVX2 -ipo hello.c
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# $ ./a.out
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# Please verify that both the operating system and the \
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# processor support Intel(R) AVX instructions.
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#
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# NB: The same flags are applied in:
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# - ../libint/package.py
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#
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# Related:
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# - ../fftw/package.py variants: simd, fma
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# - ../c-blosc/package.py variant: avx2
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# - ../r-rcppblaze/package.py AVX* in "info" but not in code?
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# - ../openblas/package.py variants: cpu_target!?!
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# - ../cp2k/package.py
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#
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# Documentation at:
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# https://software.intel.com/en-us/cpp-compiler-18.0-developer-guide-and-reference-ax-qax
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#
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optflags += ' -xSSE4.2 -axAVX,CORE-AVX2 -ipo'
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if which('xiar'):
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env.set('AR', 'xiar')
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optflags = '-O2'
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env.append_flags('CFLAGS', optflags)
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env.append_flags('CFLAGS', optflags)
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env.append_flags('FCFLAGS', optflags)
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env.append_flags('FCFLAGS', optflags)
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if '%intel' in self.spec and which('xiar'):
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env.set('AR', 'xiar')
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if '+cuda' in self.spec:
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if '+cuda' in self.spec:
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nvcc = self.spec['cuda'].prefix.bin.nvcc
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nvcc = self.spec['cuda'].prefix.bin.nvcc
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env.set('CCLD', '{0} -ccbin {1}'.format(nvcc, spack_cc))
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env.set('CCLD', '{0} -ccbin {1}'.format(nvcc, spack_cc))
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