diff --git a/lib/spack/external/__init__.py b/lib/spack/external/__init__.py index 26ac1f63d0..f6f481a6ae 100644 --- a/lib/spack/external/__init__.py +++ b/lib/spack/external/__init__.py @@ -18,7 +18,7 @@ * Homepage: https://pypi.python.org/pypi/archspec * Usage: Labeling, comparison and detection of microarchitectures -* Version: 0.2.4 (commit 48b92512b9ce203ded0ebd1ac41b42593e931f7c) +* Version: 0.2.5-dev (commit 7e6740012b897ae4a950f0bba7e9726b767e921f) astunparse ---------------- diff --git a/lib/spack/external/archspec/cpu/detect.py b/lib/spack/external/archspec/cpu/detect.py index d99295d907..f9f095f78a 100644 --- a/lib/spack/external/archspec/cpu/detect.py +++ b/lib/spack/external/archspec/cpu/detect.py @@ -47,7 +47,11 @@ def decorator(factory): def partial_uarch( - name: str = "", vendor: str = "", features: Optional[Set[str]] = None, generation: int = 0 + name: str = "", + vendor: str = "", + features: Optional[Set[str]] = None, + generation: int = 0, + cpu_part: str = "", ) -> Microarchitecture: """Construct a partial microarchitecture, from information gathered during system scan.""" return Microarchitecture( @@ -57,6 +61,7 @@ def partial_uarch( features=features or set(), compilers={}, generation=generation, + cpu_part=cpu_part, ) @@ -90,6 +95,7 @@ def proc_cpuinfo() -> Microarchitecture: return partial_uarch( vendor=_canonicalize_aarch64_vendor(data), features=_feature_set(data, key="Features"), + cpu_part=data.get("CPU part", ""), ) if architecture in (PPC64LE, PPC64): @@ -345,6 +351,10 @@ def sorting_fn(item): generic_candidates = [c for c in candidates if c.vendor == "generic"] best_generic = max(generic_candidates, key=sorting_fn) + # Relevant for AArch64. Filter on "cpu_part" if we have any match + if info.cpu_part != "" and any(c for c in candidates if info.cpu_part == c.cpu_part): + candidates = [c for c in candidates if info.cpu_part == c.cpu_part] + # Filter the candidates to be descendant of the best generic candidate. # This is to avoid that the lack of a niche feature that can be disabled # from e.g. BIOS prevents detection of a reasonably performant architecture diff --git a/lib/spack/external/archspec/cpu/microarchitecture.py b/lib/spack/external/archspec/cpu/microarchitecture.py index 7a251b905e..1ffe51d918 100644 --- a/lib/spack/external/archspec/cpu/microarchitecture.py +++ b/lib/spack/external/archspec/cpu/microarchitecture.py @@ -2,9 +2,7 @@ # Archspec Project Developers. See the top-level COPYRIGHT file for details. # # SPDX-License-Identifier: (Apache-2.0 OR MIT) -"""Types and functions to manage information -on CPU microarchitectures. -""" +"""Types and functions to manage information on CPU microarchitectures.""" import functools import platform import re @@ -65,21 +63,24 @@ class Microarchitecture: passed in as argument above. * versions: versions that support this micro-architecture. - generation (int): generation of the micro-architecture, if - relevant. + generation (int): generation of the micro-architecture, if relevant. + cpu_part (str): cpu part of the architecture, if relevant. """ - # pylint: disable=too-many-arguments + # pylint: disable=too-many-arguments,too-many-instance-attributes #: Aliases for micro-architecture's features feature_aliases = FEATURE_ALIASES - def __init__(self, name, parents, vendor, features, compilers, generation=0): + def __init__(self, name, parents, vendor, features, compilers, generation=0, cpu_part=""): self.name = name self.parents = parents self.vendor = vendor self.features = features self.compilers = compilers + # Only relevant for PowerPC self.generation = generation + # Only relevant for AArch64 + self.cpu_part = cpu_part # Cache the ancestor computation self._ancestors = None @@ -111,6 +112,7 @@ def __eq__(self, other): and self.parents == other.parents # avoid ancestors here and self.compilers == other.compilers and self.generation == other.generation + and self.cpu_part == other.cpu_part ) @coerce_target_names @@ -143,7 +145,8 @@ def __repr__(self): cls_name = self.__class__.__name__ fmt = ( cls_name + "({0.name!r}, {0.parents!r}, {0.vendor!r}, " - "{0.features!r}, {0.compilers!r}, {0.generation!r})" + "{0.features!r}, {0.compilers!r}, generation={0.generation!r}, " + "cpu_part={0.cpu_part!r})" ) return fmt.format(self) @@ -190,6 +193,7 @@ def to_dict(self): "generation": self.generation, "parents": [str(x) for x in self.parents], "compilers": self.compilers, + "cpupart": self.cpu_part, } @staticmethod @@ -202,6 +206,7 @@ def from_dict(data) -> "Microarchitecture": features=set(data["features"]), compilers=data.get("compilers", {}), generation=data.get("generation", 0), + cpu_part=data.get("cpupart", ""), ) def optimization_flags(self, compiler, version): @@ -360,8 +365,11 @@ def fill_target_from_dict(name, data, targets): features = set(values["features"]) compilers = values.get("compilers", {}) generation = values.get("generation", 0) + cpu_part = values.get("cpupart", "") - targets[name] = Microarchitecture(name, parents, vendor, features, compilers, generation) + targets[name] = Microarchitecture( + name, parents, vendor, features, compilers, generation=generation, cpu_part=cpu_part + ) known_targets = {} data = archspec.cpu.schema.TARGETS_JSON["microarchitectures"] diff --git a/lib/spack/external/archspec/json/cpu/microarchitectures.json b/lib/spack/external/archspec/json/cpu/microarchitectures.json index 1e8a8caa35..5e1b2851e8 100644 --- a/lib/spack/external/archspec/json/cpu/microarchitectures.json +++ b/lib/spack/external/archspec/json/cpu/microarchitectures.json @@ -2225,10 +2225,14 @@ ], "nvhpc": [ { - "versions": "21.11:", + "versions": "21.11:23.8", "name": "zen3", "flags": "-tp {name}", - "warnings": "zen4 is not fully supported by nvhpc yet, falling back to zen3" + "warnings": "zen4 is not fully supported by nvhpc versions < 23.9, falling back to zen3" + }, + { + "versions": "23.9:", + "flags": "-tp {name}" } ] } @@ -2711,7 +2715,8 @@ "flags": "-mcpu=thunderx2t99" } ] - } + }, + "cpupart": "0x0af" }, "a64fx": { "from": ["armv8.2a"], @@ -2779,7 +2784,8 @@ "flags": "-march=armv8.2-a+crc+crypto+fp16+sve" } ] - } + }, + "cpupart": "0x001" }, "cortex_a72": { "from": ["aarch64"], @@ -2816,7 +2822,8 @@ "flags" : "-mcpu=cortex-a72" } ] - } + }, + "cpupart": "0xd08" }, "neoverse_n1": { "from": ["cortex_a72", "armv8.2a"], @@ -2902,7 +2909,8 @@ "flags": "-tp {name}" } ] - } + }, + "cpupart": "0xd0c" }, "neoverse_v1": { "from": ["neoverse_n1", "armv8.4a"], @@ -2926,8 +2934,6 @@ "lrcpc", "dcpop", "sha3", - "sm3", - "sm4", "asimddp", "sha512", "sve", @@ -3028,7 +3034,8 @@ "flags": "-tp {name}" } ] - } + }, + "cpupart": "0xd40" }, "neoverse_v2": { "from": ["neoverse_n1", "armv9.0a"], @@ -3052,13 +3059,10 @@ "lrcpc", "dcpop", "sha3", - "sm3", - "sm4", "asimddp", "sha512", "sve", "asimdfhm", - "dit", "uscat", "ilrcpc", "flagm", @@ -3066,18 +3070,12 @@ "sb", "dcpodp", "sve2", - "sveaes", - "svepmull", - "svebitperm", - "svesha3", - "svesm4", "flagm2", "frint", "svei8mm", "svebf16", "i8mm", - "bf16", - "dgh" + "bf16" ], "compilers" : { "gcc": [ @@ -3102,15 +3100,19 @@ "flags" : "-march=armv8.5-a+sve -mtune=cortex-a76" }, { - "versions": "10.0:11.99", + "versions": "10.0:11.3.99", "flags" : "-march=armv8.5-a+sve+sve2+i8mm+bf16 -mtune=cortex-a77" }, + { + "versions": "11.4:11.99", + "flags" : "-mcpu=neoverse-v2" + }, { - "versions": "12.0:12.99", + "versions": "12.0:12.2.99", "flags" : "-march=armv9-a+i8mm+bf16 -mtune=cortex-a710" }, { - "versions": "13.0:", + "versions": "12.3:", "flags" : "-mcpu=neoverse-v2" } ], @@ -3145,7 +3147,113 @@ "flags": "-tp {name}" } ] - } + }, + "cpupart": "0xd4f" + }, + "neoverse_n2": { + "from": ["neoverse_n1", "armv9.0a"], + "vendor": "ARM", + "features": [ + "fp", + "asimd", + "evtstrm", + "aes", + "pmull", + "sha1", + "sha2", + "crc32", + "atomics", + "fphp", + "asimdhp", + "cpuid", + "asimdrdm", + "jscvt", + "fcma", + "lrcpc", + "dcpop", + "sha3", + "asimddp", + "sha512", + "sve", + "asimdfhm", + "uscat", + "ilrcpc", + "flagm", + "ssbs", + "sb", + "dcpodp", + "sve2", + "flagm2", + "frint", + "svei8mm", + "svebf16", + "i8mm", + "bf16" + ], + "compilers" : { + "gcc": [ + { + "versions": "4.8:5.99", + "flags": "-march=armv8-a" + }, + { + "versions": "6:6.99", + "flags" : "-march=armv8.1-a" + }, + { + "versions": "7.0:7.99", + "flags" : "-march=armv8.2-a -mtune=cortex-a72" + }, + { + "versions": "8.0:8.99", + "flags" : "-march=armv8.4-a+sve -mtune=cortex-a72" + }, + { + "versions": "9.0:9.99", + "flags" : "-march=armv8.5-a+sve -mtune=cortex-a76" + }, + { + "versions": "10.0:10.99", + "flags" : "-march=armv8.5-a+sve+sve2+i8mm+bf16 -mtune=cortex-a77" + }, + { + "versions": "11.0:", + "flags" : "-mcpu=neoverse-n2" + } + ], + "clang" : [ + { + "versions": "9.0:10.99", + "flags" : "-march=armv8.5-a+sve" + }, + { + "versions": "11.0:13.99", + "flags" : "-march=armv8.5-a+sve+sve2+i8mm+bf16" + }, + { + "versions": "14.0:15.99", + "flags" : "-march=armv9-a+i8mm+bf16" + }, + { + "versions": "16.0:", + "flags" : "-mcpu=neoverse-n2" + } + ], + "arm" : [ + { + "versions": "23.04.0:", + "flags" : "-mcpu=neoverse-n2" + } + ], + "nvhpc" : [ + { + "versions": "23.3:", + "name": "neoverse-n1", + "flags": "-tp {name}" + } + ] + }, + "cpupart": "0xd49" }, "m1": { "from": ["armv8.4a"], @@ -3211,7 +3319,8 @@ "flags" : "-mcpu=apple-m1" } ] - } + }, + "cpupart": "0x022" }, "m2": { "from": ["m1", "armv8.5a"], @@ -3289,7 +3398,8 @@ "flags" : "-mcpu=apple-m2" } ] - } + }, + "cpupart": "0x032" }, "arm": { "from": [], diff --git a/lib/spack/external/archspec/json/cpu/microarchitectures_schema.json b/lib/spack/external/archspec/json/cpu/microarchitectures_schema.json index c21a3a1b37..085e5b9577 100644 --- a/lib/spack/external/archspec/json/cpu/microarchitectures_schema.json +++ b/lib/spack/external/archspec/json/cpu/microarchitectures_schema.json @@ -52,6 +52,9 @@ } } } + }, + "cpupart": { + "type": "string" } }, "required": [ @@ -107,4 +110,4 @@ "additionalProperties": false } } -} +} \ No newline at end of file