minighost: rework link logic (#7402)
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b0795d84c7
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1 changed files with 3 additions and 5 deletions
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@ -54,7 +54,8 @@ def build_targets(self):
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if '+mpi' in self.spec:
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if '+mpi' in self.spec:
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targets.append('PROTOCOL=-D_MG_MPI')
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targets.append('PROTOCOL=-D_MG_MPI')
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targets.append('FC={0}'.format(self.spec['mpi'].mpif77))
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targets.append('FC={0}'.format(self.spec['mpi'].mpif77))
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targets.append('CC={0}'.format(self.spec['mpi'].mpicc))
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# CC is only used for linking, use it to pull in the right f77 libs
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targets.append('CC={0}'.format(self.spec['mpi'].mpif77))
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else:
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else:
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targets.append('PROTOCOL=-D_MG_SERIAL')
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targets.append('PROTOCOL=-D_MG_SERIAL')
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targets.append('FC=f77')
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targets.append('FC=f77')
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@ -62,10 +63,7 @@ def build_targets(self):
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if '%gcc' in self.spec:
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if '%gcc' in self.spec:
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targets.append('COMPILER_SUITE=gnu')
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targets.append('COMPILER_SUITE=gnu')
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if '+mpi' in self.spec:
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targets.append('LIBS=-lm -lgfortran')
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targets.append('LIBS=-lm -lmpi_f77 -lmpi -lgfortran')
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else:
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targets.append('LIBS=-lm -lgfortran')
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elif '%cce' in self.spec:
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elif '%cce' in self.spec:
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targets.append('COMPILER_SUITE=cray')
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targets.append('COMPILER_SUITE=cray')
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elif '%intel' in self.spec:
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elif '%intel' in self.spec:
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